User manual TEXAS INSTRUMENTS STELLARIS LM3S1512 DATA SHEET REV D

[. . . ] TE X AS I NS TRUM E NTS - P RO DUCTION D ATA Stellaris® LM3S1512 Microcontroller D ATA SH E E T D S -LM 3S 1512 - 7 3 9 3 C opyri ght © 2007-2010 Texas Instruments Incorporated Copyright Copyright © 2007-2010 Texas Instruments Incorporated All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments Incorporated. ARM and Thumb are registered trademarks and Cortex is a trademark of ARM Limited. Products conform to specifications per the terms of Texas Instruments standard warranty. [. . . ] Value Description 0x00000000 Enables 96 KB of flash. 170 Texas Instruments-Production Data June 23, 2010 Stellaris® LM3S1512 Microcontroller Register 15: Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C Note: Offset is relative to System Control base address of 0x400FE000. This register stores the read-only protection bits for each 2-KB flash block (FMPPEn stores the execute-only bits). The factory settings for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. The register bits may be changed by writing the specific register bit. However, this register is R/W0; the user can only change the protection bit from a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it may be restored by executing a power-on reset sequence. For additional information, see the "Flash Memory Protection" section. Flash Memory Protection Read Enable 3 (FMPRE3) Base 0x400F. E000 Offset 0x20C Type R/W, reset 0x0000. 0000 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 READ_ENABLE Type Reset R/W 0 15 R/W 0 14 R/W 0 13 R/W 0 12 R/W 0 11 R/W 0 10 R/W 0 9 R/W 0 8 R/W 0 7 R/W 0 6 R/W 0 5 R/W 0 4 R/W 0 3 R/W 0 2 R/W 0 1 R/W 0 0 READ_ENABLE Type Reset R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 R/W 0 Bit/Field 31:0 Name READ_ENABLE Type R/W Reset Description 0x00000000 Flash Read Enable Enables 2-KB flash blocks to be executed or read. The policies may be combined as shown in the table "Flash Protection Policy Combinations". Value Description 0x00000000 Enables 96 KB of flash. June 23, 2010 Texas Instruments-Production Data 171 Internal Memory Register 16: Flash Memory Protection Program Enable 1 (FMPPE1), offset 0x404 Note: Offset is relative to System Control base address of 0x400FE000. This register stores the execute-only protection bits for each 2-KB flash block (FMPREn stores the execute-only bits). Other FMPPEn registers (if any) provide protection for other 64K blocks. The factory settings for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. The register bits may be changed by writing the specific register bit. However, this register is R/W0; the user can only change the protection bit from a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it may be restored by executing a power-on reset sequence. The reset value shown only applies to power-on reset; any other type of reset does not affect this register. If the Flash memory size on the device is less than 64 KB, this register usually reads as zeroes, but software should not rely on these bits to be zero. For additional information, see the "Flash Memory Protection" section. Flash Memory Protection Program Enable 1 (FMPPE1) Base 0x400F. E000 Offset 0x404 Type R/W, reset 0x0000. FFFF 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 PROG_ENABLE Type Reset R/W 0 15 R/W 0 14 R/W 0 13 R/W 0 12 R/W 0 11 R/W 0 10 R/W 0 9 R/W 0 8 R/W 0 7 R/W 0 6 R/W 0 5 R/W 0 4 R/W 0 3 R/W 0 2 R/W 0 1 R/W 0 0 PROG_ENABLE Type Reset R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 R/W 1 Bit/Field 31:0 Name PROG_ENABLE Type R/W Reset Description 0x0000FFFF Flash Programming Enable Value Description 0x0000FFFF Bits [31:0] each enable protection on a 2-KB block of Flash memory in memory range from 65 to 128 KB. 172 Texas Instruments-Production Data June 23, 2010 Stellaris® LM3S1512 Microcontroller Register 17: Flash Memory Protection Program Enable 2 (FMPPE2), offset 0x408 Note: Offset is relative to System Control base address of 0x400FE000. This register stores the execute-only protection bits for each 2-KB flash block (FMPREn stores the execute-only bits). The factory settings for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. [. . . ] 108-Ball BGA Package June 23, 2010 Texas Instruments-Production Data 525 Package Information Note: The following notes apply to the package drawing. Symbols A A1 A3 c D D1 E E1 b bbb ddd e f M n MIN 1. 22 0. 29 0. 65 0. 28 9. 85 NOM 1. 36 0. 34 0. 70 0. 32 10. 00 8. 80 BSC MAX 1. 50 0. 39 0. 75 0. 36 10. 15 9. 85 10. 00 8. 80 BSC 10. 15 0. 43 0. 48 . 20 . 12 0. 80 BSC 0. 53 - 0. 60 12 108 REF: JEDEC MO-219F - 526 Texas Instruments-Production Data June 23, 2010 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. [. . . ]