User manual TEXAS INSTRUMENTS TMS320UC5402 DATA MANUAL REV C

[. . . ] TMS320UC5402 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS096C April 1999 - Revised October 2008 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Revision History REVISION HISTORY This data sheet revision history highlights the technical changes made to the SPRS096B device-specific data sheet to make it an SPRS096C revision. Scope: This document has been reviewed for technical accuracy; the technical content is up-to-date as of the specified release date with the following changes. PAGE(S) NO. [. . . ] When multiple channels are selected, each frame represents a time-division multiplexed (TDM) data stream. In using TDM data streams, the CPU may only need to process a few of them. Thus, to save memory and bus bandwidth, multichannel selection allows independent enabling of particular channels for transmission and reception. The clock-stop mode (CLKSTP) in the McBSP provides compatibility with the serial peripheral interface (SPI) protocol. Clock-stop mode works with only single-phase frames and one word per frame. The word sizes supported by the McBSP are programmable for 8-, 12-, 16-, 20-, 24-, or 32-bit operation. When the McBSP is configured to operate in SPI mode, both the transmitter and the receiver operate together as a master or as a slave. The McBSP is fully static and operates at arbitrarily low clock frequencies. The maximum frequency is CPU clock frequency divided by 2. 2. 2. 3 Hardware Timer The UC5402 device features two 16-bit timing circuits with 4-bit prescalers. The main counter of each timer is decremented by one every CLKOUT cycle. Each time the counter decrements to 0, a timer interrupt is generated. The timers can be stopped, restarted, reset, or disabled by specific control bits. 2. 2. 4 Clock Generator The clock generator provides clocks to the UC5402 device, and consists of an internal oscillator and a phase-locked loop (PLL) circuit. The clock generator requires a reference clock input, which can be provided by using a crystal resonator with the internal oscillator, or from an external reference clock source. The reference clock input is then divided by two or four (DIV mode) to generate clocks for the UC5402 device, or the PLL circuit can be used (PLL mode) to generate the device clock by multiplying the reference clock frequency by a scale factor. This allows the use of a clock source with a lower frequency than that of the CPU. The PLL is an adaptive circuit that, once synchronized, locks onto and tracks an input clock signal. NOTE: If an external clock source is used, the CLKIN signal level should not exceed CVDD + 0. 3 V. When the PLL is initially started, it enters a transitional mode during which the PLL acquires lock with the input signal. Once the PLL is locked, it continues to track and maintain synchronization with the input signal. Then, other internal clock circuitry allows the synthesis of new clock frequencies for use as master clock for the UC5402 device. 18 SPRS096C April 1999 - Revised October 2008 Functional Overview This clock generator allows system designers to select the clock source. The sources that drive the clock generator are: · · A crystal resonator circuit. The crystal resonator circuit is connected across the X1 and X2/CLKIN pins of the UC5402 to enable the internal oscillator. The external clock source is directly connected to the X2/CLKIN pin, and X1 is left unconnected. [. . . ] MicroStar BGAt configuration MicroStar BGA is a trademark of Texas Instruments Incorporated. POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 0, 80 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. [. . . ]