User manual TEXAS INSTRUMENTS TUSB3200A DATA MANUAL REV A

[. . . ] TUSB3200A USB Streaming Controller (STC) Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Literature Number: SLES018A October 2001 ­ Revised July 2010 TUSB3200A SLES018A ­ OCTOBER 2001 ­ REVISED JULY 2010 www. ti. com Contents 1 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1. 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [. . . ] Also in the external MCU mode, the GPIO ports are used for the external MCU data, address, and control signals. See Section 1. 7, Terminal Functions ­ External MCU Mode, for details. In this mode, the external MCU or ICE is able to access the memory mapped IO registers, the USB configuration blocks and the USB buffer space. See Section 1. 8, Device Operation Modes, for information regarding the various modes of operation. Texas Instruments has developed the TUSB3200A evaluation module (EVM) to allow customers to develop application firmware and to evaluate device performance. The EVM board provides a 40-pin dip socket for an ICE in addition to headers to allow expansion of the system in a variety of ways. 2. 2. 11 Interrupt Logic The 8052 MCU core used in the TUSB3200A supports all the standard interrupt sources. The five standard MCU interrupt sources are timer 0, timer 1, serial port, external 1 (INT1), and external 0 (INT0). All of the additional interrupt sources within the TUSB3200A device are ORed together to generate the INT0 signal to the MCU. See the interrupt vector register for more details on the other TUSB3200A interrupt sources. The other interrupt sources are the eight USB in endpoints, the eight USB out endpoints, USB function reset, USB function suspend, USB function resume, USB start-of-frame, USB pseudo start-of-frame, USB setup stage transaction, USB setup stage transaction over-write, codec port interface transmit data register empty, codec port interface receive data register full, I2C interface transmit data register empty, I2C interface receive data register full, and the external interrupt input. The interrupts for the USB in endpoints and USB out endpoints can not be masked. An interrupt for a particular endpoint occurs at the end of a successful transaction to that endpoint. However, these status bits are read only, and therefore, these bits are intended to be used for diagnostic purposes only. After a successful transaction to an endpoint, both the interrupt and status bit for an endpoint will be asserted until the interrupt is cleared by the MCU. The USB function reset, USB function suspend, USB function resume, USB start-of-frame, USB pseudo start-of-frame, USB setup stage transaction, and USB setup stage transaction over-write interrupts can all be masked. See the USB interrupt mask register and the USB status register for more details. For these interrupts, both the interrupt and status bit will be asserted until the interrupt is cleared by the MCU. The codec port interface transmit data register empty, codec port interface receive data register full, I2C Interface transmit data register empty, and I2C interface receive data register full interrupts can all be masked. However, for these interrupts, the status bits are not cleared automatically when the interrupt is cleared by the MCU. See the codec port interface control/status register and the I2C interface control/status register for more details. The external interrupt input (XINT) is also ORed together with the on-chip interrupt sources. An enable bit exists for this interrupt in the global control register. [. . . ] Falls within JEDEC MS-026 POST OFFICE BOX 655303 · DALLAS, TEXAS 75265 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. [. . . ]